Ultra-low noise in a Complementary Metal Oxide Semiconductor (CMOS) Image Sensor (CIS) pixel requires minimizing the capacitance of conversion node. However, minimizing the capacitance limits the full well because the voltage on the output signal line has a limited range. A traditional CIS pixel is illustrated in FIG. 1 and comprises a photodiode 1, for generating an electric charge incident upon the photodiode 1. The photodiode is connected to a transfer gate or switch 2, which is in turn connected to a conversion node 4 having a reset switch 12 and diode 3. The conversion node 4, also known in the industry as a floating diffusion, outputs to an active transistor 5, which is often implemented as a source follower, and the pixel is controlled by a select Field Effect Transistor (FET) 6.
Known systems, such as those in FIG. 2 and FIG. 3, overcome the limited full well problem by adding an additional switch or FET 8 acting as a switch to allow additional capacitance, either in the form of an additional capacitor or by utilizing the parasitic capacitance of the reset switch of a neighboring pixel connected with a switch 8 added in parallel to the conversion node 4 to provide a second mode with higher noise and higher read noise. The problem is that adding the extra component directly on the conversion node means that the noise in the low noise mode is not as low as for a pixel without this feature. What is needed, therefore, are techniques for providing a CIS pixel with low capacitance, low noise, and an improved full well.